Shift-Left and Accelerate Sustainable Silicon
Baum’s innovative technology enables low-power RTL development in the early stages of the design cycle
Baum’s innovative technology enables low-power RTL development in the early stages of the design cycle
I need to analyze power profile for hundreds of millions of clock cycles of workload data.
Its accurate and high-performance power model enables users to explore large workloads with a high level of accuracy under various simulation environments. Baum power models integrate into RTL simulations or emulation to achieve orders of magnitude performance improvement compared to competing solutions in the market.
I need to monitor the progress of power efficiency metrics (rather than power value itself) in everyday RTL development cycle.
PowerSpion uses RTL design and RTL FSDB to compute power efficiency metrics without running computation-expensive power analysis. It also offers a linting feature to check if there is any redundant or misused ICGs in your RTL. Thanks to its fast speed and lightweight nature, PowerSpion enables customers to seamlessly integrate it into their RTL CI/CD pipeline, facilitating daily monitoring of progress in power efficiency metrics.
I need to convert RTL FSDB into gate-level FSDB to save effort and time for running gate-level simulation.
PowerWurzel is Baum’s gate-level simulation engine that understands both RTL and gate-level FSDB. Combining PowerWurzel with PowerBaum creates a powerful and efficient flow to generate extremely fast and accurate power models.
Watch short animations illustrating Baum’s technology
Download product brochure
Aug 30, 2024
Baum Design Systems is pleased to announce that we will be sponsoring the 2024 Design and Verification Conference and Exhibition Taiwan (DVCon Taiwan 2024), which will be held in Hsinchu, Taiwan on September 10-11, 2024. Baum will be participating as a Platinum Sponsor.
At booth 7, we will showcase PowerSpion, PowerWurzel, and PowerBaum and share the latest update. PowerSpion can provide power optimization guidance for RTL design with linting and vector-based clock gating matric report. PowerWurzel is a solution that converts RTL FSDB to gate-level FSDB and analyzes it, contributing to shortening power validation TAT. Baum’s signature product, PowerBaum, enables accurate and fast power analysis using realistic scenarios by training power models and linking it with RTL simulators.
To learn more about Baum and how you can enhance your low-power methodology, please join us at a presentation “Low Power Design Methodology for Early Design Stage” on Wednesday, September 11th at 10:20 AM (Track 2, Session 3.3).